This invention relates to a circuit for subtracting a constant amount of charge from a given charge sample such as may be used in a Charge Coupled Device (CCD).
Charge Coupled Devices (CCDs) now find widespread use in consumer devices, including digital cameras, cellular telephones, wireless data network equipment, audio devices such as MP3 players, and video equipment such as Digital Video Disk (DVD) players, High Definition Digital Television (HDTV) equipment, and numerous other products. In CCD-based circuits, signals are represented as charge packets or as differential charge packet-pairs.
The CCD devices themselves provide a basic function of storing and moving isolated packets of charge. Various circuits are known in the art for then performing arithmetic and other operations on the stored packets. For example, charge packets can be added together (merged), split into two or more pieces, conditionally steered down one circuit path or another, destructively or non-destructively sensed, and the like. The availability of these circuits make it quite easy to adapt CCDs to a large number of signal processing tasks.
One mathematical operation which has proved somewhat difficult to implement is subtraction. Various methods for this have been described in previous publications and/or patents. For example, U.S. Pat. No. 4,239,983 issued to Edwards, N. P. et al., and assigned to International Business Machines Corporation, discloses a circuit for obtaining a quantity of electrical charge that is representative of the difference between two original charge quantities. In the approach described in this patent, a pair of CCD input shift registers each contain at least one potential well that is operated in a floating gate mode. The two spatially separated charge packets are sequenced into and out of the pair of registers. The two floating gate electrode outputs are then combined at a common node and rectified. The rectified output represents the difference between the two original charge packets.
Publications by Fossum, E. R., “A linear and compact charge coupled charge packet differencer/replicator”, IEEE Trans. Electron Devices, Vol. 31, No. 12, pp 1284–1287, December 1984; and “Wire transfer of charge packets using a CCD-BVD structure for a charge domain signal processing,” IEEE Trans. Electron Devices, Vol. 38, No. 2, pp. 291–298, February 1991, describe still other approaches to charge subtraction by removing a fixed amount of charge from a charge packet. However, these circuits suffer from various problems such as introducing non-linearities, susceptibility to noise, and slow operating speed.
The prior art also includes another method for subtracting a charge, using a voltage stored in a capacitor. This method does not provide for directly subtracting two signal charge packets—but it does allow a signal (or a constant value introduced as a voltage) to determine the amount of charge to be subtracted. In this circuit, a so-called “wire transfer” device is used that is similar to the one described in the above mentioned papers by Fossum. In this improved approach, however, a capacitor and switched voltage node are used together with the wire transfer device to perform charge subtraction.
This technique does have advantages over other methods of charge subtraction since it (1) is very linear with respect to the subtracted or added values; (2) can be made very linear with respect to the starting charge packet value from which the subtraction occurs; (3) operates at the same speed as the CCD signal processing elements in which it is embedded; (4) introduces very little noise; and (5) can be used to transfer charge from one CCD segment to a non-adjacent CCD segment during the subtraction/addition process.